Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.

• ISBN: 978-1-4899-9318-2
• Editorial: Springer
• Encuadernacion: Rústica
• Fecha Publicación: 26/11/2014
• Nº Volúmenes: 1
• Idioma: Inglés